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> Is SDIO support a hardware or a software/driver issue?
darkeye
post Feb 4 2004, 04:05 AM
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Hi,

I'm wondering if SDIO support is really a hardware or a software/driver issue. I'm basing this on the fact that, for example, the Handspring Treo 90 didn't have SDIO support when released, but a software upgrade added SDIO support, see http://www.treocentral.com/content/Stories/115-5.htm.

I also found this (rather dated) article: http://www.pmn.co.uk/20021112sharp.shtml saying:

QUOTE
As with the Sl-5500, it supports both Compact Flash and Secure Digital cards, but does not yet support SDIO due to licensing problems with the closed-source SD drivers


So, is this really a closed-source driver problem? Aren't there any open source projects to create drivers? Or is this a licensing issue? Maybe we could live with a binary (closed) driver....
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Foxdie
post Feb 4 2004, 05:05 AM
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It appears no one is willing to investigate SDIO, one excuse I got was the licensing issue.

I've asked the Cacko team but they are very busy with their contracts with various Russian / European companies and can't investigate it for a few months yet.
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darkeye
post Feb 4 2004, 05:10 AM
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I found this thread on the ARM mailing list on the licensing issue:

http://www.spinics.net/lists/arm/msg06394.html

but, strangely enough, there is a Samsung cell phone running Linux and having SDIO support:

http://www.mobileburn.com/news-brief.jsp?Id=569

hm, maybe we should ask Samsung for the drivers? smile.gif
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lardman
post Feb 4 2004, 05:23 AM
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I think read somewhere (either this forum or the devnet) that not all the pins were connected on the 5500 (or it might have been the 5600) which is of course a hardware problem. Other than that I know nothing.

Si
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post Feb 4 2004, 07:25 AM
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SDIO cards require an interrupt line which is not used in memory cards. I don't think SL5500 has that wire.
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zbones
post Feb 4 2004, 01:28 PM
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QUOTE
SDIO cards require an interrupt line which is not used in memory cards. I don't think SL5500 has that wire.


But there have been a lot of rumors flying around saying that the 5600 onwards are fully wired.

Somebody even claimed to have got it working, but when pushed did't provide any source/links to any code.

Part of the problem here is that we have a cf slot as well as an sd slot, so we still have access to stuff like bluetooth, wifi, gps, modem etc. It is less of an incentive to get the sd versions of these cards working.

If we only had an sd slot, I am sure someone would have sorted this by now. Even if that means soldering a wire in the back of the zaurus.

If sharp do include sdio drivers/support on the 6000 or other future models then it will get backported like the usb card reader stuff has.

I used to really crave sdio on my 5500, as my internal flash space was used for a swap file and all my apps were on sd. I would have preferred to put my apps on a faster cf card, and use sd for wifi/bluetooth.

On the cx60 then you have so much internal memory free (96mb) that you don't need to use home on an sd card anymore, as it also has 64mb of ram, you don't really need the swap file either.
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coder101
post Feb 5 2004, 07:12 PM
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Would these specs help?
http://www.samsung.com/Products/Semiconduc...ev12_030428.pdf
It has information on SDIO registers.
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qx773
post Feb 10 2004, 10:18 PM
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I found an Intel document on the web which lists errata with the PXA255 microprocessor. One erratum concerns itself with incompatibility with various MMC cards.

Compatibility

SPI mode: Lexar, Viking, DaneElec
Stream mode: Sandisk
Block mode: All

So, among these brands, all of the cards are compatible with the processor in Block mode. Only the Sandisk card was compatible in Stream mode. Only the Sandisk card was incompatible in SPI (Serial Programming Interface?) mode.

The problem of incompatiblity with various cards may be due to errors in the microprocessor. Other errata for the PXA255 are listed as:

[list]MultiMediaCard Stream Writes Do Not Transmit Properly.
Watchdog Reset Causes the Real Time Clock (RTC) to Increment at the Wrong Frequency.
Drain Write Buffer Command Does Not Force All Memory Requests Out to the External Bus.
Unindexed Mode LDC/STC Instructions Can Corrupt Protected Registers.
[list]. The document contains wording to the effect that is confidential, but if they wanted it to be confidential, they should not have posted it in the clear on the World Wide Web.
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raybert
post Feb 11 2004, 07:34 AM
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QUOTE
Watchdog Reset Causes the Real Time Clock (RTC) to Increment at the Wrong Frequency.


hmm... I've noticed several times now that my C860 seems to have lost some time after a reboot. I wonder if this has something to do with it?

Do you know any more details about this "watchdog reset"? i.e. when does it take place and what is it designed to protect?

If it takes place during a reboot and it slows the clock down, this probably explains what I've observed.

~ray
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post Feb 11 2004, 08:22 AM
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haha,
c7x0/860 havent real RTC chip, they use PXA register which have 1 sec increment. When you reboot your Z, sltime command save current time in /dev/mtd1 and after rebooting run sltime again for read this value. So, every time after reboot you have lost few seconds (mins).

~sashz
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raybert
post Feb 11 2004, 04:04 PM
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Interesting...

Well, thanks for that info. I guess that explains it.

I guess c[78]60 owners should not leave their units unbooted for very long... smile.gif

~ray
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qx773
post Feb 11 2004, 06:41 PM
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I am unfamiliar with the ARM and derivative Xscale architectures. The document states that there is a workaround to the issue with the watchdog timer:

QUOTE
After every watchdog reset:

If the lock bit is not set in the RTTR register, write the appropriate value to the RTTR register and then write the appropriate value to the RCNR register.

If the lock bit is set in the RTTR register, do a dummy write to the RTTR register to resync the internal logic to the original RTTR value that was written before the lock bit was set, and then write the appropriate value to the RCNR register.


I have never seen the definition of a watchdog timer anywhere, but my inference of its meaning is that a timer counts down, and if it is allowed to reach zero, then the processor will reset itself or run some code to get back to a known state. For example, with one of the Mars rovers, some executing code may have run into corrupted memory and caused the system to malfunction. A watchdog timer that would normally be reset by a properly functioning system would then be able to count down to zero, initiating a system reset. This is a kind of event which does not happen very often, which is perhaps why a problem associated with it got past quality control for the PXA255 processor.
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qx773
post Feb 11 2004, 07:50 PM
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You can read about the errata yourself by visiting:

http://www.intel.com/design/pca/applicatio...uals/278732.htm
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mithro
post Mar 13 2004, 07:06 AM
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The Zaurus uses the Xscale's MMC stuff. They have no external chip for SD which is required to support SDIO. No driver can solve this problem sadly sad.gif
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