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OESF Portables Forum > Everything Else > Archived Forums > Zaurus General Forums > General Support and Discussion > Hardware Mods
Ok here are the details of my research to date, at the mement i am 1 pin away from being technically able to pull this hack off (GPIO18 for those who are intrested aka RDY, only used for VLIO)

hope this comes in handy, after this the next problem is sourcing chips
Note this is all 2700G7 specific, i plan to use the 2700G5 as it has suport for external Mem (up to 32MB) and 704KB of SRAM for frame buffers, the 2700G7 has only 16MB of built in MEM with no support for more as well as the FRAME Buffer, depending on which is cheaper + size constraints + avalibility + mem requirements i may change.

2700G  PXA270  Description      Avalible
SYS_nCAS    nSDCAS  System Bus Address Strobe    Yes (off SDRAM)
SYS_MA[25:2]    MA[25:2]    System Bus Address  Yes (off SDRAM and flash)
SYS_MD[31:0]    MD[31:0]    System Bus Data      Yes (off SDRAM and flash)
SYS_nOE  nOE  System Bus Output Enable    Yes (off flash)
SYS_RDnWR    RDnWR  System Bus Read/Write  Yes (off CF card)
SYS_RDY  RDY  System Bus Ready
SYS_nCS[1:0]    nCS[1:0]    System Bus Chip Select  Yes (off flash, mabey, it looks like we could steal it from that second flash slot, there are 6, we need 2 and they cant be used for anything else)
SYS_nWE  nWE  System Bus SRAM Write Enable    Yes (off SDRAM and flash)
SYS_nPWE    nPWE  System Bus VLIO Write Enable    Yes (off CF card)
SYS_DQM[3:0]    DQM[3:0]    System Bus Data Masks  Yes (off SDRAM)

System Bus Signals = 68 pins

For LCD's you get a pixel clock that incicates pixels, an Line Clock which indicates End of line (or HSYNC) and a Frame Clock (VSYNC) so you can see if you get rid of the pixel clock and add timing before clocking and after clocking the pixels out before/after the line/frame clock lines are triggered it would be compatible with a CRT, not sure but it might work with the new DVI connector with out insertint the "blanking", need to do some more research if this (the 2700G) dosen't pay off.

Local Mem Signals = 57 pins (all on PCB)

LCD_IN_DD[17:0]      LCD Data Inputs
LCD_IN_PCLK      Pixel Clock Input
LCD_IN_LCLK      Line Clock Input
LCD_IN_FCLK      Frame Clock Input
LCD_IN_DEN      LCD Data Enable Input

LCD Input Pin Signals = 22 pins (header going to LCD screen on zaurus)

LCD1_DD[23:0]      LCD Data
LCD1_PCLK      LCD Pixel Clock
LCD1_LCLK      LCD Line Clock
LCD1_FCLK      LCD Frame Clock
LCD1_DEN      LCD Data Enable
LCD1_PWM      Allows changing of backlight brightness

LCD2_DD[23:0]      LCD Data
LCD2_PCLK      LCD Pixel Clock
LCD2_LCLK      LCD Line Clock
LCD2_FCLK      LCD Frame Clock
LCD2_DEN      LCD Data Enable
LCD2_PWM      Allows changing of backlight brightness

LCD Output Pin Signals = 29 pins * 2 (primary and secondary) (One semi on board: Internal LCD connector is flat cable)

XTAL_OUT      CLOCK Input (or outptu depending on how you like it)
CLKIN    Clock input if XTAL_* not used
GPIO    General pourpos IO (Yeah!!)
POLL_FLAG      Connect to GPIO (PXA) for flow controll
nRESET_IN      Reset on LOW
nINT    Interupt to main processor (can i even acsess this line :( )
RSVD    100K pull down to ground resistor on these lines

MISC Pins = 13 Pins (not all connected)

VCC_CORE      Core Power Supply (1.2V 28 pins)
VCC_SYS    System Bus Supply (1.8V, 2.5V 9 pins)
VCC_LM    Local Mem Bus Supply (1.8V 10 pins)
VCC_SDRAM      SDRAM Device Supply (1.8V 13 pins)
VCC_LCD_IN      LCD Input Power (1.8V, 2.5V 2 pins)
VCC_LCD1      Primary LCD interface Power (1.8V, 2.5V, 3.3V 4 pins)
VCC_LCD2      Secondary LCD interface Power (1.8V, 2.5V, 3.3V 4 pins)
VCC_IO    Misc IO Power (3.3V 15 pins)
GND    GND (Come on you should know this 50 pins)
VCCA_CORE_PLL      Core PLL Analog Power (2.5V 1 pin)
VSSA_CORE_PLL      Core PLL Analog Gnd (Gnd 1 pin)
VCCA_DISP_PLL      Display PLL Analog Power (2.5V 1 pin)
VSSA_DISP_PLL      Display PLL Analog Gnd (Gnd 1 pin)
VAA_XTAL      Crystal Osscilator Analog Power (2.5V 1 pin)
VSSA_XTAL      Crystal Osscilator Analog Power (Gnd 1 pin)

Power Pins = 141 (all on PCB)
I really hope you can pull this off. Great work!
Just need to find that last IO and it should be easy to do, i can put it on the same card as the RAM upgrade then
Ok so gpio18 is avalible thanks to albetr os now i have to source parts, time to send an email to as many third party manufacturers as i can find

maybe we need to look at newer hardware?

it's a bit big but things are getting there:
er, I think I meant this page, sorry:


already supports linux, comes with SDK...

I've asked dspdesign for prices
the Three top players that i can see are also the ones who dont ship in small volumes and this is not that big a problem if you only want VGA output and not acceleration

at the moment i could just as easily make a video framebuffer with limited acceleration that plugged into the cf port rather than get the 2700g working and i belive it would be a lot easier to do as if you look at my notes some of the signals are comming off the sdram chip as i intended for this to be done in conjunction with a ram upgrade

at this pont in time i am wondering what to do:
*CF graphics card with pitiful transfer rate to framebuffer (might be able to pull a trick or two to boost data transfer)
*just try and get the 2700G
*get another chip
*Build and design a PDA from scratch

the research i have done so far is basically enough to allow anyone to slap on any chip that can be slaped onto the pxa270 as its the map for the pinout of both the memorey bus and thi VLIO (refer to doc's you could atach a Harddrive to thi vlio if you want) if you have the time and money, the only problem bieng the sdram lines but they are probelly somwhere else on the board connecte to a via that can be soldered onto.

the CF interface would be nice as it would work on any PDA/PC and is a nice simple project that can easily be expanded (if i use a fpga) and upgraded (an upgradeable vga card, nice) and it would be the cheapest to do, but you lose a cf slot, the video cards on the other hand would be model specific and require a bit of skill and hardare to get the job done and the PDA thing is a can of worms that has its own thread.

so i guess i should put it to the people: What do you guys want? considering ill have the cash to pull any of the above off and the time to do it
WOW, long post. Sorry bout that
Video output by itself is very nice (especially if it could be able to do the output of unconverted video, like onto LCD), but 2700G or something like that, especially together with RAM upgrade would be absolutely fantastic.
QUOTE(Reaper @ Jun 9 2006, 08:40 AM)
Video output by itself is very nice (especially if it could be able to do the output of unconverted video, like onto LCD), but 2700G or something like that, especially together with RAM upgrade would be absolutely fantastic.

maybe prices and availability info would help getting a commitment?

A ram/video upgrade woud be very cool, but it sounds like the cf video out holds the most promise-- wider application, likely lower cost, etc.

a custom handheld would be interesting, but I'd have to read the thread before I could say more.
*CF graphics card with pitiful transfer rate to framebuffer

Just how "pitiful" is this? Just pitiful compared with soldered on-board install, or "pitiful" as in might as well keep what I have? The video on my 6000 is reasonably good (if encoded right), but still can occasionally get blocky. Would this CF video card eat much battery?
Pitiful is 16MBs and cuts into avalible sdram bandwidth and microdrive acsess so any of those will affect each other

if you do the 16M / yres by xres * (colurdepth/4) you get the refresh rate for any res so for moive playback you need to drop the res a bit, however i can do a bit of 2d accelaration and moive playback stuff to help bump up the speed a bit as well as some register hacks i have been looking into

battery wise im not sure, it definattly wont chew as much as a wifi card
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