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OESF Forums > Distros, Development, and Model Specific Forums > PocketPenguin

speculatrix

Feb 17 2007, 12:43 PM

http://www.sycard.com/cflash.html

this looks like a useful adaptor for debugging a compact flash interface

Da_Blitz

Feb 17 2007, 05:57 PM

i think for the moment the FPGA will suffice, i dont even know how useful somthing like that would be. perhaps if i had to builh a CF card interface chip but not really for somthing thats been tested already

the topiuc brings some intresting questions, what other equipment besides a fpga and some interface tools, an ossciliscope, a jtag cable and a serial cable. will i need? (hardware wise)

i belive i have the bases covered in terms of hardware but it wouldnt supprise me if i forgot something

speculatrix

Feb 18 2007, 02:05 PM

how will you program the initial boot loader - jtag? or will you have a tiny in-system-programmable qfp flash memory and a programmer?

when debugging the cpu board, it can help to put the cpu into an adaptor so you can probe the pins more easily, essential if the CPU is BGA. might want/need a logic analyser to check the memory interface timings, although these days the "heisenberg uncertainty effect" means that simply probing the bus can introduce more clock skew and make a broken system worse!

Da_Blitz

Feb 19 2007, 02:47 AM

so true

looks like inital programming will be done with jtag, or if i remeber the data sheet corecttly USB (wasent there usb bootloader code in there)

with the mem clock stuff i hope it works on the first time but thats wishful thinking, underneath the BGA part should be a whole lot of vias for testing that in the final version will be made blind

speculatrix

Feb 22 2007, 01:56 AM

Here's an interesting jtag tool:
http://www.hitex.co.uk/1509.html

QUOTE

Tantino
This compact and cost-effective debug interface supports all run-control debug facilities like breakpoints, watchpoints, single-step, register and memory view. Together with the HiTOP5 IDE, a Windows based environment, you have everything to compile and debug your application including RTOS support.

The following list summarizes the technical details:
* Available for the following architectures:
ARM7-9, ARM11, netX, Intel XScale, XC166, XC800, CR16C, CP3BT, S12
* Target interface supporting voltages 1.8 - 5.0V and clocks up to 24MHz (depends on target CPU)
* USB full speed interface
* USB powered
* Run-control facilities: run / halt, single step / line step, breakpoints and watchpoints
* Fast program download with up to 200kByte/s (depends on target CPU)
* Fast FLASH programming for internal and external FLASH memory

The Tantino package includes:
* Tantino debugger
* CD with windows based HiTOP5 IDE (compatible with all Hitex tools) and electronic user manual
* Target and USB cable
* HiTOP license for target architecture
* Hitex support

---edit---

just found the price of the tantino jtag-controlling flasher on their web shop: GBP300 + tax = GBP400, so US$800 or EUR600.

ouch. I think home brew jtag is a better option unless you've got real money funding you.

Da_Blitz

Feb 22 2007, 03:24 AM

i wish more asic makers would do what microchip did and just put the dubugging stuff on board the chip, it was great you get a $20 part and it emulates nearly every chip on the market because you dont have to by a sepearte in cuircit debugger

had hardware support for single stepping and all, now if the iMX.3 had this built into the serial port it would be great or better yet the usb port

stampsm

Feb 22 2007, 11:20 PM

i have an ulink usb jtag tool i got a while ago. do you know if it is compatible with the i.mx31 processor?

Da_Blitz

Feb 23 2007, 01:31 AM

actually my fpga arived today with a parralell jtag cable so ill give that a go. it just bit bangs but its better than nothing and i dont really need any more than that

only problem is i have to reboot the machine to enable the parallel port (disabled in the bios)

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