GCC 3.4 has two intersting arm specific improvements:
"Nicolas Pitre has contributed his hand-coded floating-point support code for ARM. It is both significantly smaller and faster than the existing C-based implementation, even when building applications for Thumb. The arm-elf configuration has been converted to use the new code."
So that'll mean slightly less painful float opperations, cool.
"The existing ARM pipeline description has been converted to the use the
DFA processor pipeline model. There is not much change in code performance, but the description is now
easier to understand."
Should mean better instruction scheduling, though I doubt it takes account of Intel's crazy branch prediction tinkering or the 7 stage pipeline (ARM is 5 stage).
The
40 bit accumulator and dual 16 bit SIMD extensions should come in handy for audio processing and maybe also jpeg/mpeg decompression as I believe they consist of mostly 16bit operations. Don't quote me on that one. Probably reasonably easy to get some 16bit fixed point maths going on it as well, not sure if it has shift instructions though. Need to patch the kernel to save and restore the register on context switches, not sure if this has been done.
The
Ati IMAGEON 100 2d graphics chip has some love to give as well.
Work has started on reverse engineering it's interface. Hopefuly we can look forward to hardware accelerated rendering in the future and also hardware mpeg 4 playback through the
XvMC API.
Exciting times for the z.
Did I miss anything, get anything wrong?
Cheers
Dan
