Boris,
Thank you for helping me out! Yes, I'm using the "A" schemantics from your drawing. After you explained it, now I can see why I'm having the problem under load.
So, if the MOSFET is the right way to go, may I ask you a couple of questions?
1. Why do we need s NPN transistor AND a P-ch MOSFET? Can we simplify the schemantics by using a sole N-ch MOSFET? Can then we just connect active-high signal from GPIO pin directly to GATE pin of MOSFET (assuming that it's the logic level input, we don't need a resistor?). SOURCE pin of the MOSFET then would be +5VDC source, and load would be connected to DRAIN pin? Can this schemantics work, or I'm missing something? (sorry, as you can see I lack the basic knowledge of electrical engineering).
2. Speaking of MOSFETs, I'd probably like to use a dual channel one to control both modules and save some space. If I have a chance to select from different MOSFETs (i.e. can order any MOSFET made by FairChild Semi), what are the most important characterictics to look for? Obviously, I'd like to minimize current leakage in OFF state and voltage drop under load in ON state. Does it mean that the lower value of "Drain-to-Source ON resistance" is the better?
-albertr