Actually this does look like a kernel related issue.
The display is actually handled via DMA from certain memory mapped regions (one for eash wsdisplay screen).
It appears that following an access to the bitmap returned by mmap of the frame buffer (used to gain access to the memory map) of /dev/ttyC0 the cache coherency is swictched off. This essentially means that DMA transfer to the screen for this region is subject to cache rather than immediate write through from this point onwards.
Since the bitmap for ttyC1 hasn't been touched in this manner this appears to be why the second VT is unaffected.
Interestingly enough the mmap call handler for the lcd device does actually specify that DMA should be coherent. The coherency seems to be being dropped when the mmap is being freed.
I tested this with the following test program.
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#define WIDTH 640
#define HEIGHT 480
main()
{
u_short *mapaddr;
u_short *tptr;
int fd;
u_short nTval;
int nCount1,nCount2,nCount3;
int mode = WSDISPLAYIO_MODE_DUMBFB;
/* Open the display */
fd = open("/dev/ttyC0", O_RDWR);
if (fd < 0)
err(2, "open /dev/ttyC0");
if (ioctl(fd, WSDISPLAYIO_SMODE, &mode) == -1)
warn("ioctl SMODE");
mapaddr = (void *)mmap(0, WIDTH*HEIGHT*sizeof(short),
PROT_READ|PROT_WRITE, MAP_SHARED, fd, (off_t)0);
if (mapaddr == (void *)-1)
err(2, "mmap");
/* Our simple test pattern flash 12 blue stripes 5 times with 2 second gaps */
nTval=0;
for (nCount1=0;nCount1<10;nCount1++) {
nTval^=0x00ff; /* toggle nTval */
tptr=mapaddr;
for (nCount2=0;nCount2<12;nCount2++) {
for (nCount3=0;nCount3<480;nCount3++)
*(tptr++)=nTval;
tptr+=25*2*480; /* Skip 25 raster lines */
}
sleep(2);
}
mode = WSDISPLAYIO_MODE_EMUL;
munmap((void*) mapaddr,WIDTH*HEIGHT*sizeof(short));
if (ioctl(fd, WSDISPLAYIO_SMODE, &mode) == -1)
warn("ioctl SMODE");
}
The stripes are there to generate some non sequential access so that the DMA controller doesn't simply burst the updates and generate a false test pattern. If the coherency was missing at this stage then we may expect to see some graphical artifacts in the stripes, potentially at the end of the stripes. We don't see this so I surmise that coherency is enabled for the DMA when the frame buffer is in bitmapped mode.
I am now looking at why coherency seems to be disabled when the region is unmapped... incidentally the X server seems to omit the unmap call (and for that matter the call to free the buffer that it uses to preserve the screen contents). This obviously has little bearing upon the issue being observed.
-Andy
